Lecture materials will be available here.

  • 1. Introduction to Computer Architecture
    Lecture date: Jan 20, 2026
    tl;dr: Introduction to course logistics and a conceptual overview of computer architecture, focusing on the software-hardware interface and instruction sets.
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  • 2. Language of Bits: Part 1
    Lecture date: Jan 22, 2026
    tl;dr: Introduction to the language of bits, with a review of Boolean algebra.
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  • 3. Language of Bits: Part 2
    Lecture date: Jan 23, 2026
    tl;dr: Introduction to the language of bits, covering binary number systems and representations of integers.
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  • 4. Language of Bits: Part 3
    Lecture date: Jan 27, 2026
    tl;dr: Introduction to the language of bits, covering representations of integers and floating-point numbers.
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  • 5. Language of Bits: Part 4
    Lecture date: Jan 29, 2026
    tl;dr: Introduction to the language of bits, covering representations of floating-point numbers and overflow.
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  • 6A. Language of Bits: Part 5
    Lecture date: Jan 30, 2026
    tl;dr: Introduction to the language of bits, covering representations of floating-point numbers and character encodings.
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  • 6B. Assembly Language: Part 1
    Lecture date: Jan 30, 2026
    tl;dr: Introduction to assembly language, covering registers and memory.
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  • 7. Assembly Language: Part 2
    Lecture date: Feb 3, 2026
    tl;dr: Introduction to assembly language, covering registers and memory organization, instruction syntax, addressing modes, and an overview of instruction set architectures using the SimpleRisc ISA as an example.
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  • 8. Assembly Language: Part 3
    Lecture date: Feb 5, 2026
    tl;dr: SimpleRisc assembly programming, covering instruction syntax, registers and memory, arithmetic and logical operations, addressing modes, and load–store instructions through worked examples.
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  • 9. Assembly Language: Part 4
    Lecture date: Feb 6, 2026
    tl;dr: Control flow and advanced SimpleRisc assembly, covering branch instructions, loops, conditionals, load–store usage, and immediate-value modifiers through worked programs.
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  • 10. Assembly Language: Part 5
    Lecture date: Feb 12, 2026
    tl;dr: Functions in assembly: implementing calls and returns, argument passing, register spilling, activation records, and the use of the stack for managing function execution.
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  • 11. Assembly Language: Part 6
    Lecture date: Feb 13, 2026
    tl;dr: Instruction encoding in SimpleRisc, covering opcodes, instruction formats (register, immediate, and branch), and how assembly instructions are represented as 32-bit machine code.
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  • 12. A Primer On Digital Logic: Part 1
    Lecture date: Feb 19, 2026
    tl;dr: A high-level primer on digital logic, introducing transistors as switches, CMOS gates (inverter, NAND, NOR), and basic combinational building blocks like multiplexers.
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  • 13. A Primer On Digital Logic: Part 2
    Lecture date: Feb 20, 2026
    tl;dr: Combinational and sequential logic circuits, including multiplexers, demultiplexers, decoders, encoders, and storage elements like SR latches and clocked latches.
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  • 14. A Primer On Digital Logic: Part 3
    Lecture date: Feb 24, 2026
    tl;dr: Sequential logic elements, covering clocked latches and flip-flops (D and J-K), edge-triggered operation, and how digital circuits store and transfer state using clock signals.
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  • 15. A Primer On Digital Logic: Part 4
    Lecture date: Feb 26, 2026
    tl;dr: Memory circuits, covering SRAM and DRAM cells and arrays, read/write operations, precharging and sensing.
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  • 16. A Primer On Digital Logic: Part 5
    Lecture date: March 5, 2026
    tl;dr: DRAM refresh mechanisms and an introduction to content-addressable memory (CAM) and its array organization.
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  • 17. Computer Arithmetic: Part 1
    Lecture date: March 5, 2026
    tl;dr: Hardware implementation of binary addition, covering half adders, full adders, ripple carry adders, and faster adder designs such as carry select adders using asymptotic analysis.
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  • 18. Computer Arithmetic: Part 2
    Lecture date: March 24, 2026
    tl;dr: Fast addition using carry lookahead: computing carries in parallel via generate/propagate functions and a hierarchical design.
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  • 19. Processor Design: Part 1
    Lecture date: March 26, 2026
    tl;dr: Processor design using a staged pipeline (IF, OF, EX, MA, RW), covering instruction decoding, datapath and control path, register file access, branch handling, and ALU operations in SimpleRISC.
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  • 20. Processor Design: Part 2
    Lecture date: March 31, 2026
    tl;dr: Hardwired control unit design, covering how opcode and instruction bits generate control signals to coordinate datapath operations across pipeline stages.
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  • 21. Processor Design: Part 3
    Lecture date: April 2, 2026
    tl;dr: Microprogrammed control, covering how instructions are implemented as sequences of microinstructions using a microcontrol unit, internal registers, and a shared datapath.
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